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alot of work on the compiler should be fully working

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master
Reese 3 years ago
parent e4cd440c89
commit 58297bd0bc
5 changed files with 164 additions and 39 deletions
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5
RGPC1/assemblyone.txt
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@ -9,6 +9,7 @@ R Indicates the value stored in A/B is a register
Opcodes:
NUL = 00000000 Nothing but faster
NOP = 001010-- Nothing!
ALU = 1XXXXY--
If Y is 1 invert output
@ -23,11 +24,9 @@ Opcodes:
JMP = 011000-- Jump to A ignore B
JNZ = 000100-- Jump if A is not zero to B
JGZ = 010100-- Jump if A is greater than zero to B
JLZ = 001100-- Jump if A is less than zero to B
JLZ = 001100-- Jump if the eighth bit of A is set to 1 jump to B
JEZ = 011100-- Jump if A is zero to B
NOP = 001010-- Nothing!
DBL = 000010-- Blink a light
DBB = 010010-- Beep a beeper

166
RGPC1/compiler.py
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@ -4,6 +4,28 @@
import sys
def getreg(g):
temp = g
if registers.get(instruction[1], 'fail') != 'fail':
temp = temp + registers.get(instruction[1]) + ';'
temp = temp.replace('a', '1')
else:
binified = format(int(instruction[1]), '08b')[:8].replace('-', '1')
temp = temp + binified + ';'
temp = temp.replace('a', '0')
if registers.get(instruction[2], 'fail') != 'fail':
temp = temp + registers.get(instruction[2]) + ';'
temp = temp.replace('b', '1')
else:
binified = format(int(instruction[2]), '08b')[:8].replace('-', '1')
temp = temp + binified + ';'
temp = temp.replace('b', '0')
return temp
if len(sys.argv) < 2:
print("Add arguments!")
quit()
@ -13,8 +35,8 @@ markers = {}
file = open(sys.argv[1])
fullfile = file.readlines()
file.close()
output = open(sys.argv[1].strip('.ra') + '.rc', 'w+')
line = 1
output = open(sys.argv[1].strip('.ra') + '.rb', 'w+')
line = 0
registers = {
#normal
@ -29,6 +51,18 @@ registers = {
'dbgi': '00000011',
'pgcr': '00000100'}
for i in fullfile:
line = line + 1
instruction = i.strip()
instruction = instruction.lower().split(' ')
print(instruction)
if instruction[0][:1] == '!':
line = line - 1
markers[instruction[0][1:].strip('\n')] = line
print("marker")
print(markers)
for i in fullfile:
temp = None
binified = None
@ -38,46 +72,130 @@ for i in fullfile:
instruction = instruction.lower().split(' ')
print(instruction)
if instruction[0][0] == '!':
markers[instruction[0][1:].strip('\n')] = line
line = line - 1
print("marker")
elif instruction[0] == 'nul':
if instruction[0] == 'nul':
print("nul")
output.write('00000000\n')
elif instruction[0] == 'nop':
print("nop")
output.write('00101000\n')
elif instruction[0] == 'mov':
print("mov")
temp = '010000ab;'
if registers.get(instruction[1], 'fail') != 'fail':
temp = temp + registers.get(instruction[1]) + ';'
temp = getreg(temp)
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'add':
print("add")
temp = '11000yab;'
temp = getreg(temp)
if len(instruction) > 3:
if instruction[3] == 'not':
temp = temp.replace('y', '1')
else:
temp = temp.replace('y', '0')
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'sub':
print("sub")
temp = '10100yab;'
temp = getreg(temp)
if len(instruction) > 3:
if instruction[3] == 'not':
temp = temp.replace('y', '1')
else:
temp = temp.replace('y', '0')
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'or':
print("or")
temp = '11100yab;'
temp = getreg(temp)
if len(instruction) > 3:
if instruction[3] == 'not':
temp = temp.replace('y', '1')
else:
temp = temp.replace('y', '0')
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'xor':
print("xor")
temp = '10010yab;'
temp = getreg(temp)
if len(instruction) > 3:
if instruction[3] == 'not':
temp = temp.replace('y', '1')
else:
temp = temp.replace('y', '0')
elif instruction[0] == 'and':
print("and")
temp = '11010yab;'
temp = getreg(temp)
if len(instruction) > 3:
if instruction[3] == 'not':
temp = temp.replace('y', '1')
else:
temp = temp.replace('y', '0')
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'jmp':
print("jmp")
temp = '011000a0;'
if markers.get(instruction[1], 'fail') != 'fail':
temp = temp + format(int(markers.get(instruction[1])), '08b')
temp = temp.replace('a', '1')
else:
binified = bin(int(instruction[1]))[2:][::-1]
binified = format(int(instruction[1]), '08b')[:8].replace('-', '1')
temp = temp + binified + ';'
temp = temp.replace('a', '0')
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'dbl':
print("dbl")
temp = '00001000;00000000;00000000'
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'dbb':
print("dbb")
temp = '01001000;00000000;00000000'
print(temp)
output.write(temp + '\n')
elif instruction[0] == 'hlt':
print("hlt")
temp = '00000100;00000000;00000000'
print(temp)
output.write(temp + '\n')
elif instruction[0] == '':
print("newline")
temp = '00000000;00000000;00000000'
print(temp)
output.write(temp + '\n')
elif instruction[0][:1] == '!':
print("marker")
print("Ignoreing this")
line = line - 1
pass
if registers.get(instruction[2], 'fail') != 'fail':
temp = temp + registers.get(instruction[2])
temp = temp.replace('b', '1') + '\n'
output.write(str(temp))
else:
binified = bin(int(instruction[2]))[2:][::-1]
temp = temp + binified
temp = temp.replace('b', '0') + '\n'
output.write(str(temp))
elif instruction[0] == 'add':
print("add")
else:
print("Error!")
print("Line: " + str(line))
#quit()
print(markers)

23
RGPC1/fib.ra
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@ -1,12 +1,11 @@
MOV 1 A
MOV 1 B
MOV -100 C
MOV A DBGO
!lop:
ADD A B
MOV A B
MOV ACC A
MOV A DBG0
ADD A C
JLZ ACC lop
HLT
MOV 1 A
MOV 1 B
MOV 100 C
ADD A B
MOV ACC DBGO
XOR A B NOT
JMP marker
!marker
OR A B

9
RGPC1/fib.rb
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@ -0,0 +1,9 @@
01000001;00000001;00100000;
01000001;00000001;01100000;
01000001;01100100;00010000;
11000011;00100000;01100000;
01000011;01000000;00000010;
01100010;00001001
00000000;00000000;00000000
00000000;00000000;00000000
11100011;00100000;01100000;

0
RGPC1/fib.rc
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