Reese 3 years ago
parent cc1275a923
commit 866f32cb11

@ -8,6 +8,8 @@ R Indicates the value stored in A/B is a register
Opcodes:
NUL = 00000000 Nothing but faster
ALU = 1XXXXY--
If Y is 1 invert output
ADD = -1000Y-- Add A to B output to ACC
@ -19,7 +21,6 @@ Opcodes:
MOV = 010000-- Move A to B
JMP = 011000-- Jump to A ignore B(?)
A = 00100000
JNZ = 000100-- Jump if A is not zero to B
JGZ = 010100-- Jump if A is greater than zero to B
JLZ = 001100-- Jump if A is less than zero to B
@ -34,8 +35,8 @@ Opcodes:
Registers:
RAM = 1XXXXXXX R/W
-0000000 | -1111111
RAM = 1XXXXXCC R/W 8bit wide 96 bytes total 32 instructions
-00000-- | -11111--
ACC = 01000000 R 8bit
A = 00100000 R/W 8bit
@ -47,13 +48,13 @@ Registers:
FULL = 00000001 R 8bit
DBGO = 00000010 W Debug output 8bit
DBGI = 00000011 R Debug input 8bit
PGCR = 00000100 R/W Program Counter 7bit
PGCR = 00000100 R/W Program Counter 5bit
Example program (Human readable + binary):
OPCODE A B
MOV 1 A 01000001;00000001;00100000
MOV 1 B 01000001;00000001;01100000
MOV -100 C 01000001;11100100;00010000
MOV 1 A 01000001;10000000;00100000
MOV 1 B 01000001;10000000;01100000
MOV -100 C 01000001;00100111;00010000
MOV A DBGO 01000011;00100000;00000010
lop: 00101000;00000000;00000000
ADD A B 11000011;00100000;01100000
@ -61,5 +62,13 @@ lop: 00101000;00000000;00000000
MOV ACC A 01000011;01000000;00100000
MOV A DBG0 01000011;00100000;00000010
ADD A C 11000011;00100000;00010000
JLZ ACC lop 00110010;01000000;00000101
JLZ ACC lop 00110010;01000000;10100000
HLT 00000100;00000000;00000000
Control bus:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
C R R R R R R R R R P P A A B B C C Z F D D X X
L A A A A A A A A A G G R W R W R W E U B B
O M M M M M M M M M C C R L G G
C L L L L L C C R W R W O L O I
K R R W R
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